Samsung Electronics’ foundry division is preparing to introduce its second-generation 8-nanometer 8LPU+ process platform before the end of the year, extending the lifespan of its mature DUV lithography manufacturing lines. Industry sources reported on the upcoming release, noting that the new process delivers a 12 percent improvement in performance, a 15 percent reduction in power consumption, and an approximate 8 percent shrinkage in logic area compared to its predecessor, the 8LPU.
The 8-nanometer manufacturing node traces its commercial roots back to 2017, when Samsung successfully developed the 8LPP process. As the final generation of advanced nodes relying on deep ultraviolet (DUV) immersion lithography before the industry-wide adoption of extreme ultraviolet (EUV) equipment, the 8-nanometer platform has achieved mature status. Following the introduction of the performance-optimized 8LPU in 2018, the newly developed 8LPU+ represents a targeted refinement designed to meet specific market demands.
While cutting-edge operations at the 5-nanometer, 4-nanometer, and 2-nanometer levels offer higher raw computing power, they require EUV lithography for critical patterning layers. Single EUV units command massive capital expenditures running into hundreds of billions of Korean won, driving up overall wafer production costs. Furthermore, equipment supply remains constrained globally by a single manufacturer, ASML. By contrast, the 8-nanometer process utilizes established DUV equipment lines that have already undergone depreciation and amortization. Backed by long-term accumulation, mature yield data, and predictable costs, the DUV-based approach offers lower entry barriers for automotive and industrial chip suppliers that have already secured relevant certifications.
Samsung’s 8LPU+ platform specifically targets artificial intelligence microcontrollers and automotive zone control units. The modern automotive sector increasingly relies on ZCU architectures, which divide vehicles into distinct geographical zones managed by dedicated local controllers. This structural shift across body control, powertrains, and door assemblies creates a sustained surge in chip demand. For automotive systems and industrial robotics, operational temperature ranges, long-term supply stability, embedded memory capacity, and unit pricing take precedence over raw peak performance.
Miniaturization remains a critical engineering hurdle for these applications. Even when edge AI chips successfully reduce the physical area of their core computing blocks, input-output interfaces and embedded non-volatile memory required to retain data during power-off states continue to occupy substantial silicon space. To address this, the 8LPU+ platform integrates 3.3-volt planar I/O devices onto the existing 8-nanometer FinFET wafer infrastructure, successfully shrinking the I/O footprint by roughly 10 percent.
The manufacturing process also addresses standby power consumption during vehicle shutdowns or robotic idle states by incorporating ultra-low leakage static random-access memory and high-threshold voltage devices. Additionally, the embedded magnetoresistive random-access memory, which preserves data without power, satisfies Automotive Grade 1 specifications. Featuring a unit cell area of 0.017 square micrometers and a storage density of approximately 20 megabits per square millimeter, the memory architecture accommodates larger data capacities within equivalent physical dimensions, facilitating further miniaturization of controller chips.
Industry insiders indicate that Samsung’s existing 8-nanometer foundry ecosystem clients, alongside fabless semiconductor firms seeking automotive qualification, represent the primary prospective adopters for the 8LPU+ platform. Because domestic and international design houses and application-specific integrated circuit developers already possess familiarity with tape-outs for edge AI system-on-chips using 8-nanometer eMRAM technology, the transition barrier for the new platform remains low.
